11. JTAG Interface Operation

11.2 Instruction Register


The JTAG instruction register is four bits wide, permitting a total of 16 instructions to control the selection of the bypass register, the boundary scan register, and other data registers.

The encoding of the instruction register is given in Table 11-1:

Table 11-1 JTAG Instruction Register Encoding

The 0001 value is provided to represent sample-preload, but also selects the boundary scan register.

During a reset of the TAP controller, the value 1111 is loaded into the parallel output of the instruction register, thus selecting the bypass register as the default.

During the Shift-IR state of the TAP controller, data is shifted serially into the instruction register from JTDI, and the LSB of the instruction register is shifted out onto JTDO.

During the Update-IR state, the current state of the instruction register is shifted to its parallel output for decoding.




Copyright 1995, MIPS Technologies, Inc. -- 29 JAN 96


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